A hub is required to receive data from one of many high-speed serial transmitters, each transmitter clocked asynchronously from other transmitters. Such a hub may be used, for example, in a direct access storage device (DASD) controller in a computer system, where transmitters are adapters linking computer elements such as processors and disk arrays, to a cache by way of the hub. Data is clocked into the hub by the currently selected transmitter. When a different transmitter is switched to transmit, a glitch may occur in the incoming clock. This glitch may cause problems within the hub including unwanted state changes and missed or repeated data.
Current solutions to the problem require a memory buffer for each transmission line in the hub. Data is clocked into a buffer by the transmitter clock and clocked out of the buffer by a clock generated in the hub. In this way, the hub clock does not experience glitches when switching between transmitters. A problem with these solutions is the cost of placing a buffer on each incoming serial channel.
A system and method are needed that can multiplex a set of incoming serial channels, each with a separate clock, without causing a glitch in the hub and without the cost of a buffer for each channel.